cef0a71bce
They're never actually going to change independently, and it's also brining in kutil headers more places than they should be.
142 lines
3.9 KiB
C++
142 lines
3.9 KiB
C++
#pragma once
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/// \file pci.h
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/// PCI devices and groups
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#include <stdint.h>
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#include "kutil/memory.h"
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struct pci_group;
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enum class isr : uint8_t;
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struct pci_cap
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{
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enum class type : uint8_t
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{
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msi = 0x05,
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msix = 0x11
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};
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type id;
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uint8_t next;
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} __attribute__ ((packed));
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/// Information about a discovered PCIe device
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class pci_device
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{
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public:
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/// Default constructor creates an empty object.
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pci_device();
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/// Constructor
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/// \arg group The group of this device's bus
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/// \arg bus The bus number this device is on
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/// \arg device The device number of this device
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/// \arg func The function number of this device
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pci_device(pci_group &group, uint8_t bus, uint8_t device, uint8_t func);
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/// Check if this device is multi-function.
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/// \returns True if this device is multi-function
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inline bool multi() const { return m_multi; }
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/// Get the bus number this device is on.
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/// \returns The bus number
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inline uint8_t bus() const { return (m_bus_addr >> 8); }
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/// Get the device number of this device on its bus
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/// \returns The device number
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inline uint8_t device() const { return (m_bus_addr >> 3) & 0x1f; }
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/// Get the function number of this device on its device
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/// \returns The function number
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inline uint8_t function() const { return m_bus_addr & 0x7; }
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/// Get the device class
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/// \returns The PCI device class
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inline uint8_t devclass() const { return m_class; }
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/// Get the device subclass
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/// \returns The PCI device subclass
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inline uint8_t subclass() const { return m_subclass; }
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/// Get the device program interface
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/// \returns The PCI device program interface
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inline uint8_t progif() const { return m_progif; }
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/// Read one of the device's Base Address Registers
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/// \arg i Which BAR to read (up to 5 for non-bridges)
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/// \returns The contents of the BAR
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uint32_t get_bar(unsigned i);
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/// Write one of the device's Base Address Registers
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/// \arg i Which BAR to read (up to 5 for non-bridges)
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/// \arg val The value to write
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void set_bar(unsigned i, uint32_t val);
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/// Write to the MSI registers
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/// \arg addr The address to write to the MSI address registers
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/// \arg data The value to write to the MSI data register
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void write_msi_regs(uintptr_t addr, uint16_t data);
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/// Get a bus address, given the bus/device/function numbers.
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/// \arg bus Number of the bus
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/// \arg device Index of the device on the bus
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/// \arg func The function number within the device
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/// \returns The computed bus_addr
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static inline uint16_t bus_addr(uint8_t bus, uint8_t device, uint8_t func)
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{
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return bus << 8 | device << 3 | func;
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}
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private:
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uint32_t *m_base;
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pci_cap *m_msi;
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/// Bus address: 15:8 bus, 7:3 device, 2:0 device
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uint16_t m_bus_addr;
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uint16_t m_vendor;
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uint16_t m_device;
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uint8_t m_class;
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uint8_t m_subclass;
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uint8_t m_progif;
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uint8_t m_revision;
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bool m_multi;
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// Might as well cache these to fill out the struct align
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isr m_irq;
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uint8_t m_header_type;
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};
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/// Represents data about a PCI bus group from the ACPI MCFG
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struct pci_group
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{
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uint16_t group;
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uint16_t bus_start;
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uint16_t bus_end;
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uint32_t *base;
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/// Get the base address of the MMIO configuration registers for a device
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/// \arg bus The bus number of the device (relative to this group)
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/// \arg device The device number on the given bus
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/// \arg func The function number on the device
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/// \returns A pointer to the memory-mapped configuration registers
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inline uint32_t * base_for(uint8_t bus, uint8_t device, uint8_t func)
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{
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return kutil::offset_pointer(base,
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pci_device::bus_addr(bus, device, func) << 12);
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}
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/// Check if the given device function is present.
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/// \arg bus The bus number of the device (relative to this group)
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/// \arg device The device number on the given bus
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/// \arg func The function number on the device
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/// \returns True if the device function is present
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bool has_device(uint8_t bus, uint8_t device, uint8_t func);
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};
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