303 lines
7.1 KiB
C++
303 lines
7.1 KiB
C++
#include <stddef.h>
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#include <stdint.h>
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#include "kutil/memory.h"
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#include "console.h"
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#include "interrupts.h"
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#include "log.h"
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enum class gdt_flags : uint8_t
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{
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ac = 0x01,
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rw = 0x02,
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dc = 0x04,
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ex = 0x08,
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r1 = 0x20,
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r2 = 0x40,
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r3 = 0x60,
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pr = 0x80,
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res_1 = 0x10
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};
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inline gdt_flags
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operator | (gdt_flags lhs, gdt_flags rhs)
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{
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return static_cast<gdt_flags>(
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static_cast<uint8_t>(lhs) | static_cast<uint8_t>(rhs));
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}
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struct gdt_descriptor
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{
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uint16_t limit_low;
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uint16_t base_low;
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uint8_t base_mid;
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uint8_t flags;
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uint8_t granularity;
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uint8_t base_high;
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} __attribute__ ((packed));
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struct idt_descriptor
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{
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uint16_t base_low;
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uint16_t selector;
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uint8_t ist;
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uint8_t flags;
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uint16_t base_mid;
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uint32_t base_high;
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uint32_t reserved; // must be zero
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} __attribute__ ((packed));
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struct table_ptr
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{
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uint16_t limit;
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uint64_t base;
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} __attribute__ ((packed));
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gdt_descriptor g_gdt_table[10];
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idt_descriptor g_idt_table[256];
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table_ptr g_gdtr;
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table_ptr g_idtr;
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struct registers;
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extern "C" {
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void idt_write();
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void idt_load();
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void gdt_write();
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void gdt_load();
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void isr_handler(registers);
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void irq_handler(registers);
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#define ISR(i, name) extern void name ()
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#define EISR(i, name) extern void name ()
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#define IRQ(i, q, name) extern void name ()
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#include "interrupt_isrs.inc"
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#undef IRQ
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#undef EISR
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#undef ISR
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}
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void idt_dump(const table_ptr &table);
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void gdt_dump(const table_ptr &table);
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void
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set_gdt_entry(uint8_t i, uint32_t base, uint32_t limit, bool is64, gdt_flags flags)
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{
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g_gdt_table[i].limit_low = limit & 0xffff;
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g_gdt_table[i].base_low = base & 0xffff;
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g_gdt_table[i].base_mid = (base >> 16) & 0xff;
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g_gdt_table[i].base_high = (base >> 24) & 0xff;
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g_gdt_table[i].granularity =
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((limit >> 16) & 0xf) | (is64 ? 0xa0 : 0xc0);
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g_gdt_table[i].flags = static_cast<uint8_t>(flags | gdt_flags::res_1 | gdt_flags::pr);
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}
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void
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set_idt_entry(uint8_t i, uint64_t addr, uint16_t selector, uint8_t flags)
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{
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g_idt_table[i].base_low = addr & 0xffff;
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g_idt_table[i].base_mid = (addr >> 16) & 0xffff;
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g_idt_table[i].base_high = (addr >> 32) & 0xffffffff;
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g_idt_table[i].selector = selector;
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g_idt_table[i].flags = flags;
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g_idt_table[i].ist = 0;
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g_idt_table[i].reserved = 0;
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}
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void
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interrupts_init()
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{
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kutil::memset(&g_gdt_table, 0, sizeof(g_gdt_table));
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kutil::memset(&g_idt_table, 0, sizeof(g_idt_table));
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g_gdtr.limit = sizeof(g_gdt_table) - 1;
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g_gdtr.base = reinterpret_cast<uint64_t>(&g_gdt_table);
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set_gdt_entry(1, 0, 0xfffff, false, gdt_flags::rw);
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set_gdt_entry(2, 0, 0xfffff, false, gdt_flags::rw | gdt_flags::ex | gdt_flags::dc);
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set_gdt_entry(3, 0, 0xfffff, false, gdt_flags::rw);
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set_gdt_entry(4, 0, 0xfffff, false, gdt_flags::rw | gdt_flags::ex);
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set_gdt_entry(6, 0, 0xfffff, false, gdt_flags::rw);
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set_gdt_entry(7, 0, 0xfffff, true, gdt_flags::rw | gdt_flags::ex);
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gdt_write();
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g_idtr.limit = sizeof(g_idt_table) - 1;
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g_idtr.base = reinterpret_cast<uint64_t>(&g_idt_table);
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#define ISR(i, name) set_idt_entry(i, reinterpret_cast<uint64_t>(& name), 0x38, 0x8e);
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#define EISR(i, name) set_idt_entry(i, reinterpret_cast<uint64_t>(& name), 0x38, 0x8e);
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#define IRQ(i, q, name) set_idt_entry(i, reinterpret_cast<uint64_t>(& name), 0x38, 0x8e);
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#include "interrupt_isrs.inc"
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#undef IRQ
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#undef EISR
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#undef ISR
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idt_write();
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log::info(logs::interrupt, "Interrupts enabled.");
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gdt_dump(g_gdtr);
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idt_dump(g_idtr);
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}
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struct registers
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{
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uint64_t ds;
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uint64_t rdi, rsi, rbp, rsp, rbx, rdx, rcx, rax;
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uint64_t interrupt, errorcode;
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uint64_t rip, cs, eflags, user_esp, ss;
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};
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#define print_reg(name, value) cons->printf(" %s: %lx\n", name, (value));
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void
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isr_handler(registers regs)
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{
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console *cons = console::get();
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cons->set_color(9);
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cons->puts("\nReceived ISR interrupt:\n");
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cons->set_color();
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uint64_t cr2 = 0;
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__asm__ __volatile__ ("mov %%cr2, %0" : "=r"(cr2));
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print_reg("ISR", regs.interrupt);
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print_reg("ERR", regs.errorcode);
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print_reg("CR2", cr2);
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cons->puts("\n");
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print_reg(" ds", regs.ds);
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print_reg("rdi", regs.rdi);
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print_reg("rsi", regs.rsi);
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print_reg("rbp", regs.rbp);
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print_reg("rsp", regs.rsp);
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print_reg("rbx", regs.rbx);
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print_reg("rdx", regs.rdx);
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print_reg("rcx", regs.rcx);
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print_reg("rax", regs.rax);
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cons->puts("\n");
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print_reg("rip", regs.rip);
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print_reg(" cs", regs.cs);
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print_reg(" ef", regs.eflags);
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print_reg("esp", regs.user_esp);
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print_reg(" ss", regs.ss);
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while(1) asm("hlt");
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}
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void
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irq_handler(registers regs)
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{
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console *cons = console::get();
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cons->set_color(9);
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cons->puts("\nReceived IRQ interrupt:\n");
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cons->set_color();
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print_reg("ISR", regs.interrupt);
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print_reg("ERR", regs.errorcode);
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cons->puts("\n");
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print_reg(" ds", regs.ds);
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print_reg("rdi", regs.rdi);
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print_reg("rsi", regs.rsi);
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print_reg("rbp", regs.rbp);
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print_reg("rsp", regs.rsp);
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print_reg("rbx", regs.rbx);
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print_reg("rdx", regs.rdx);
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print_reg("rcx", regs.rcx);
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print_reg("rax", regs.rax);
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cons->puts("\n");
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print_reg("rip", regs.rip);
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print_reg(" cs", regs.cs);
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print_reg(" ef", regs.eflags);
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print_reg("esp", regs.user_esp);
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print_reg(" ss", regs.ss);
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while(1) asm("hlt");
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}
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void
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gdt_dump(const table_ptr &table)
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{
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log::info(logs::interrupt, "Loaded GDT at: %lx size: %d bytes", table.base, table.limit+1);
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int count = (table.limit + 1) / sizeof(gdt_descriptor);
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const gdt_descriptor *gdt =
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reinterpret_cast<const gdt_descriptor *>(table.base);
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for (int i = 0; i < count; ++i) {
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uint32_t base =
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(gdt[i].base_high << 24) |
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(gdt[i].base_mid << 16) |
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gdt[i].base_low;
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uint32_t limit =
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static_cast<uint32_t>(gdt[i].granularity & 0x0f) << 16 |
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gdt[i].limit_low;
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if (gdt[i].flags & 0x80) {
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log::debug(logs::interrupt,
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" Entry %3d: Base %x limit %x privs %d flags %s%s%s%s%s%s",
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i, base, limit, ((gdt[i].flags >> 5) & 0x03),
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(gdt[i].flags & 0x80) ? "P " : " ",
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(gdt[i].flags & 0x08) ? "ex " : " ",
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(gdt[i].flags & 0x04) ? "dc " : " ",
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(gdt[i].flags & 0x02) ? "rw " : " ",
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(gdt[i].granularity & 0x80) ? "kb " : "b ",
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(gdt[i].granularity & 0x60) == 0x60 ? "64" :
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(gdt[i].granularity & 0x60) == 0x40 ? "32" : "16"
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);
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}
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}
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}
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void
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idt_dump(const table_ptr &table)
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{
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log::info(logs::interrupt, "Loaded IDT at: %lx size: %d bytes", table.base, table.limit+1);
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int count = (table.limit + 1) / sizeof(idt_descriptor);
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const idt_descriptor *idt =
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reinterpret_cast<const idt_descriptor *>(table.base);
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for (int i = 0; i < count; ++i) {
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uint64_t base =
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(static_cast<uint64_t>(idt[i].base_high) << 32) |
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(static_cast<uint64_t>(idt[i].base_mid) << 16) |
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idt[i].base_low;
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char const *type;
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switch (idt[i].flags & 0xf) {
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case 0x5: type = " 32tsk "; break;
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case 0x6: type = " 16int "; break;
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case 0x7: type = " 16trp "; break;
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case 0xe: type = " 32int "; break;
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case 0xf: type = " 32trp "; break;
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default: type = " ????? "; break;
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}
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if (idt[i].flags & 0x80) {
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log::debug(logs::interrupt,
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" Entry %3d: Base:%lx Sel(rpl %d, ti %d, %3d) IST:%d %s DPL:%d", i, base,
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(idt[i].selector & 0x3),
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((idt[i].selector & 0x4) >> 2),
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(idt[i].selector >> 3),
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idt[i].ist,
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type,
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((idt[i].flags >> 5) & 0x3));
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}
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}
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}
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