a10aca573d
Instead of many timer interrupts and decrementing a process' remaining quanta, change to setting a single timer for when a process should be preempted. If it uses its whole timeslice, demote it. If it uses less than half before blocking, promote it. Determine timeslice based on priority as well. This change also required changing the apic timer interface to be purely interval (in microseconds) based instead of its previous interval/tick hybrid.
119 lines
3.4 KiB
C++
119 lines
3.4 KiB
C++
#pragma once
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/// \file apic.h
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/// Classes to control both local and I/O APICs.
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#include <stdint.h>
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enum class isr : uint8_t;
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/// Base class for other APIC types
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class apic
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{
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public:
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/// Constructor
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/// \arg base Base virtual address of the APIC's MMIO registers
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apic(uint32_t *base);
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protected:
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uint32_t *m_base;
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};
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/// Controller for processor-local APICs
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class lapic :
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public apic
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{
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public:
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/// Constructor
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/// \arg base Base virtual address of the APIC's MMIO registers
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/// \arg spurious Vector of the spurious interrupt handler
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lapic(uint32_t *base, isr spurious);
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/// Enable interrupts for the LAPIC timer.
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/// \arg vector Interrupt vector the timer should use
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/// \arg repeat If false, this timer is one-off, otherwise repeating
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void enable_timer(isr vector, bool repeat = true);
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/// Reset the timer countdown.
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/// \arg interval The interval in us before an interrupt, or 0 to stop the timer
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/// \returns The interval in us that was remaining before reset
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uint32_t reset_timer(uint64_t interval);
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/// Stop the timer.
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/// \returns The interval in us remaining before an interrupt was to happen
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inline uint32_t stop_timer() { return reset_timer(0); }
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/// Enable interrupts for the LAPIC LINT0 pin.
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/// \arg num Local interrupt number (0 or 1)
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/// \arg vector Interrupt vector LINT0 should use
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/// \arg nmi Whether this interrupt is NMI delivery mode
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/// \arg flags Flags for mode/polarity (ACPI MPS INTI flags)
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void enable_lint(uint8_t num, isr vector, bool nmi, uint16_t flags);
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void enable(); ///< Enable servicing of interrupts
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void disable(); ///< Disable (temporarily) servicing of interrupts
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/// Calibrate the timer speed against the PIT
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void calibrate_timer();
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private:
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inline uint64_t ticks_to_us(uint32_t ticks) const {
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return static_cast<uint64_t>(ticks) / m_ticks_per_us;
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}
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inline uint64_t us_to_ticks(uint64_t interval) const {
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return interval * m_ticks_per_us;
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}
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void set_divisor(uint8_t divisor);
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void set_repeat(bool repeat);
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uint32_t enable_timer_internal(isr vector, uint8_t divisor, uint32_t count, bool repeat);
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uint32_t m_divisor;
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uint32_t m_ticks_per_us;
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};
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/// Controller for I/O APICs
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class ioapic :
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public apic
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{
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public:
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/// Constructor
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/// \arg base Base virtual address of the APIC's MMIO registers
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/// \arg base_gsi Starting global system interrupt number of this IOAPIC
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ioapic(uint32_t *base, uint32_t base_gsi);
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uint32_t get_base_gsi() const { return m_base_gsi; }
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uint32_t get_num_gsi() const { return m_num_gsi; }
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/// Set a redirection entry.
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/// TODO: pick CPU
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/// \arg source Source interrupt number
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/// \arg vector Interrupt vector that should be used
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/// \arg flags Flags for mode/polarity (ACPI MPS INTI flags)
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/// \arg masked Whether the iterrupt should be suppressed
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void redirect(uint8_t irq, isr vector, uint16_t flags, bool masked);
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/// Mask or unmask an interrupt to stop/start having it sent to the CPU
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/// \arg irq The IOAPIC-local irq number
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/// \arg masked Whether to suppress this interrupt
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void mask(uint8_t irq, bool masked);
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/// Mask all interrupts on this IOAPIC.
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void mask_all() { for(int i=0; i<m_num_gsi; ++i) mask(i, true); }
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/// Unmask all interrupts on this IOAPIC.
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void unmask_all() { for(int i=0; i<m_num_gsi; ++i) mask(i, false); }
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void dump_redirs() const;
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private:
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uint32_t m_base_gsi;
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uint32_t m_num_gsi;
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uint8_t m_id;
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uint8_t m_version;
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};
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