359 lines
7.6 KiB
C++
359 lines
7.6 KiB
C++
#include <stdint.h>
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#include "console.h"
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#include "cpu.h"
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#include "device_manager.h"
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#include "gdt.h"
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#include "interrupts.h"
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#include "io.h"
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#include "log.h"
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#include "scheduler.h"
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extern "C" {
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addr_t isr_handler(addr_t, cpu_state);
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void irq_handler(cpu_state);
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void syscall_handler(cpu_state);
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#define ISR(i, name) extern void name ();
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#define EISR(i, name) extern void name ();
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#define IRQ(i, q, name) extern void name ();
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#include "interrupt_isrs.inc"
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#undef IRQ
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#undef EISR
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#undef ISR
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}
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isr
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operator+(const isr &lhs, int rhs)
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{
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using under_t = std::underlying_type<isr>::type;
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return static_cast<isr>(static_cast<under_t>(lhs) + rhs);
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}
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uint8_t
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get_irq(unsigned vector)
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{
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switch (vector) {
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#define ISR(i, name)
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#define EISR(i, name)
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#define IRQ(i, q, name) case i : return q;
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#include "interrupt_isrs.inc"
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#undef IRQ
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#undef EISR
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#undef ISR
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default: return 0xff;
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}
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}
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static void
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disable_legacy_pic()
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{
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static const uint16_t PIC1 = 0x20;
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static const uint16_t PIC2 = 0xa0;
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// Mask all interrupts
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outb(0xa1, 0xff);
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outb(0x21, 0xff);
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// Start initialization sequence
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outb(PIC1, 0x11); io_wait();
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outb(PIC2, 0x11); io_wait();
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// Remap into ignore ISRs
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outb(PIC1+1, static_cast<uint8_t>(isr::isrIgnore0)); io_wait();
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outb(PIC2+1, static_cast<uint8_t>(isr::isrIgnore0)); io_wait();
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// Tell PICs about each other
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outb(PIC1+1, 0x04); io_wait();
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outb(PIC2+1, 0x02); io_wait();
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}
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static void
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enable_serial_interrupts()
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{
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uint8_t ier = inb(COM1+1);
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outb(COM1+1, ier | 0x1);
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}
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void
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interrupts_init()
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{
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#define ISR(i, name) idt_set_entry(i, reinterpret_cast<uint64_t>(& name), 0x08, 0x8e);
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#define EISR(i, name) idt_set_entry(i, reinterpret_cast<uint64_t>(& name), 0x08, 0x8e);
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#define IRQ(i, q, name) idt_set_entry(i, reinterpret_cast<uint64_t>(& name), 0x08, 0x8e);
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#include "interrupt_isrs.inc"
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#undef IRQ
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#undef EISR
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#undef ISR
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disable_legacy_pic();
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enable_serial_interrupts();
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log::info(logs::boot, "Interrupts enabled.");
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}
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#define print_reg(name, value) cons->printf(" %s: %016lx\n", name, (value));
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extern "C" uint64_t get_frame(int frame);
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void
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print_stacktrace(int skip = 0)
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{
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console *cons = console::get();
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int frame = 0;
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uint64_t bp = get_frame(skip);
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while (bp) {
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cons->printf(" frame %2d: %lx\n", frame, bp);
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bp = get_frame(++frame + skip);
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}
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}
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addr_t
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isr_handler(addr_t return_rsp, cpu_state regs)
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{
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log::debug(logs::task, "Starting RSP %016lx", return_rsp);
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console *cons = console::get();
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switch (static_cast<isr>(regs.interrupt & 0xff)) {
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case isr::isrTimer: {
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scheduler &s = scheduler::get();
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return_rsp = s.tick(return_rsp);
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}
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break;
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case isr::isrLINT0:
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cons->puts("\nLINT0\n");
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break;
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case isr::isrLINT1:
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cons->puts("\nLINT1\n");
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break;
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case isr::isrIgnore0:
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case isr::isrIgnore1:
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case isr::isrIgnore2:
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case isr::isrIgnore3:
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case isr::isrIgnore4:
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case isr::isrIgnore5:
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case isr::isrIgnore6:
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case isr::isrIgnore7:
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/*
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cons->printf("\nIGNORED PIC INTERRUPT %d\n",
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(regs.interrupt % 0xff) - 0xf0);
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*/
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break;
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case isr::isrGPFault: {
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cons->set_color(9);
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cons->puts("\nGeneral Protection Fault:\n");
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cons->set_color();
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cons->puts(" flags:");
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if (regs.errorcode & 0x01) cons->puts(" external");
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int index = (regs.errorcode & 0xf8) >> 3;
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if (index) {
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switch (regs.errorcode & 0x06) {
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case 0:
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cons->printf(" GDT[%d]\n", index);
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gdt_dump();
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break;
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case 1:
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case 3:
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cons->printf(" IDT[%d]\n", index);
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idt_dump();
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break;
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default:
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cons->printf(" LDT[%d]??\n", index);
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break;
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}
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} else {
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cons->putc('\n');
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}
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cons->puts("\n");
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print_reg(" ds", regs.ds);
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print_reg(" cs", regs.cs);
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print_reg(" ss", regs.ss);
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cons->puts("\n");
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print_reg("rax", regs.rax);
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print_reg("rbx", regs.rbx);
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print_reg("rcx", regs.rcx);
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print_reg("rdx", regs.rdx);
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print_reg("rdi", regs.rdi);
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print_reg("rsi", regs.rsi);
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cons->puts("\n");
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print_reg("rbp", regs.rbp);
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cons->puts("\n");
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print_reg("rip", regs.rip);
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print_stacktrace(2);
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cons->puts("\nStack:\n");
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uint64_t sp = regs.user_rsp;
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while (sp <= regs.rbp) {
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cons->printf("%016x: %016x\n", sp, *reinterpret_cast<uint64_t *>(sp));
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sp += sizeof(uint64_t);
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}
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}
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while(1) asm("hlt");
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break;
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case isr::isrPageFault: {
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cons->set_color(11);
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cons->puts("\nPage Fault:\n");
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cons->set_color();
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cons->puts(" flags:");
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if (regs.errorcode & 0x01) cons->puts(" present");
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if (regs.errorcode & 0x02) cons->puts(" write");
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if (regs.errorcode & 0x04) cons->puts(" user");
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if (regs.errorcode & 0x08) cons->puts(" reserved");
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if (regs.errorcode & 0x10) cons->puts(" ip");
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cons->puts("\n");
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uint64_t cr2 = 0;
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__asm__ __volatile__ ("mov %%cr2, %0" : "=r"(cr2));
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print_reg("cr2", cr2);
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print_reg("rsp", regs.user_rsp);
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print_reg("rip", regs.rip);
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cons->puts("\n");
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print_stacktrace(2);
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}
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while(1) asm("hlt");
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break;
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case isr::isrAssert: {
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cons->set_color();
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cons->puts("\n");
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print_reg("rax", regs.rax);
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print_reg("rbx", regs.rbx);
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print_reg("rcx", regs.rcx);
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print_reg("rdx", regs.rdx);
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print_reg("rdi", regs.rdi);
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print_reg("rsi", regs.rsi);
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cons->puts("\n");
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print_reg("rbp", regs.rbp);
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print_reg("rsp", regs.user_rsp);
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cons->puts("\n");
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print_reg("rip", regs.rip);
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print_stacktrace(2);
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}
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while(1) asm("hlt");
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break;
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default:
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cons->set_color(9);
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cons->puts("\nReceived ISR interrupt:\n");
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cons->set_color();
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cons->printf(" ISR: %02lx\n", regs.interrupt);
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cons->printf(" ERR: %lx\n", regs.errorcode);
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cons->puts("\n");
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print_reg(" ds", regs.ds);
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print_reg("rdi", regs.rdi);
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print_reg("rsi", regs.rsi);
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print_reg("rbp", regs.rbp);
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print_reg("rbx", regs.rbx);
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print_reg("rdx", regs.rdx);
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print_reg("rcx", regs.rcx);
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print_reg("rax", regs.rax);
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cons->puts("\n");
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print_reg("rip", regs.rip);
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print_reg(" cs", regs.cs);
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print_reg(" ef", regs.rflags);
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print_reg("rsp", regs.user_rsp);
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print_reg(" ss", regs.ss);
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cons->puts("\n");
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print_stacktrace(2);
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while(1) asm("hlt");
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}
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*reinterpret_cast<uint32_t *>(0xffffff80fee000b0) = 0;
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log::debug(logs::task, "Returning RSP %016lx", return_rsp);
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return return_rsp;
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}
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void
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irq_handler(cpu_state regs)
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{
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console *cons = console::get();
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uint8_t irq = get_irq(regs.interrupt);
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if (! device_manager::get().dispatch_irq(irq)) {
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cons->set_color(11);
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cons->printf("\nReceived unknown IRQ: %d (vec %d)\n",
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irq, regs.interrupt);
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cons->set_color();
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print_reg(" ds", regs.ds);
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print_reg("rdi", regs.rdi);
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print_reg("rsi", regs.rsi);
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print_reg("rbp", regs.rbp);
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print_reg("rbx", regs.rbx);
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print_reg("rdx", regs.rdx);
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print_reg("rcx", regs.rcx);
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print_reg("rax", regs.rax);
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cons->puts("\n");
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print_reg("rip", regs.rip);
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print_reg(" cs", regs.cs);
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print_reg(" ef", regs.rflags);
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print_reg("rsp", regs.user_rsp);
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print_reg(" ss", regs.ss);
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while(1) asm("hlt");
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}
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*reinterpret_cast<uint32_t *>(0xffffff80fee000b0) = 0;
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}
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void
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syscall_handler(cpu_state regs)
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{
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console *cons = console::get();
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cons->printf("SYSCALL\n");
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cons->puts("\n");
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print_reg("rax", regs.rax);
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print_reg("rbx", regs.rbx);
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print_reg("rcx", regs.rcx);
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print_reg("rdx", regs.rdx);
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print_reg("rdi", regs.rdi);
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print_reg("rsi", regs.rsi);
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cons->puts("\n");
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print_reg(" r8", regs.r8);
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print_reg(" r9", regs.r9);
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print_reg("r10", regs.r10);
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print_reg("r11", regs.r11);
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print_reg("r12", regs.r12);
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print_reg("r13", regs.r13);
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print_reg("r14", regs.r14);
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print_reg("r15", regs.r15);
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cons->puts("\n");
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print_reg("rbp", regs.rbp);
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print_reg("rsp", regs.user_rsp);
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print_reg("sp0", tss_get_stack(0));
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cons->puts("\n");
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print_reg("rip", regs.rip);
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}
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