[kernel] Schedule threads on other CPUs
Now that the other CPUs have been brought up, add support for scheduling tasks on them. The scheduler now maintains separate ready/blocked lists per CPU, and CPUs will attempt to balance load via periodic work stealing. Other changes as a result of this: - The device manager no longer creates a local APIC object, but instead just gathers relevant info from the APCI tables. Each CPU creates its own local APIC object. This also spurred the APIC timer calibration to become a static value, as all APICs are assumed to be symmetrical. - Fixed a bug where the scheduler was popping the current task off of its ready list, however the current task is never on the ready list (except the idle task was first set up as both current and ready). This was causing the lists to get into bad states. Now a task can only ever be current or in a ready or blocked list. - Got rid of the unused static process::s_processes list of all processes, instead of trying to synchronize it via locks. - Added spinlocks for synchronization to the scheduler and logger objects.
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@@ -6,6 +6,8 @@
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#include "kernel_memory.h"
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#include "log.h"
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uint64_t lapic::s_ticks_per_us = 0;
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static constexpr uint16_t lapic_id = 0x0020;
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static constexpr uint16_t lapic_spurious = 0x00f0;
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@@ -54,12 +56,12 @@ apic::apic(uintptr_t base) :
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}
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lapic::lapic(uintptr_t base, isr spurious) :
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lapic::lapic(uintptr_t base) :
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apic(base),
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m_divisor(0)
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{
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apic_write(m_base, lapic_lvt_error, static_cast<uint32_t>(isr::isrAPICError));
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apic_write(m_base, lapic_spurious, static_cast<uint32_t>(spurious));
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apic_write(m_base, lapic_spurious, static_cast<uint32_t>(isr::isrSpurious));
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log::info(logs::apic, "LAPIC created, base %lx", m_base);
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}
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@@ -122,10 +124,10 @@ lapic::calibrate_timer()
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clock::get().spinwait(us);
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uint32_t remaining = apic_read(m_base, lapic_timer_cur);
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uint32_t ticks_total = initial - remaining;
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m_ticks_per_us = ticks_total / us;
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uint64_t ticks_total = initial - remaining;
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s_ticks_per_us = ticks_total / us;
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log::info(logs::apic, "APIC timer ticks %d times per microsecond.", m_ticks_per_us);
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log::info(logs::apic, "APIC timer ticks %d times per microsecond.", s_ticks_per_us);
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interrupts_enable();
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}
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@@ -145,7 +147,7 @@ lapic::set_divisor(uint8_t divisor)
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case 64: divbits = 0x9; break;
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case 128: divbits = 0xa; break;
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default:
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kassert(0, "Invalid divisor passed to lapic::enable_timer");
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kassert(0, "Invalid divisor passed to lapic::set_divisor");
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}
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apic_write(m_base, lapic_timer_div, divbits);
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