[kernel] Add MXCSR handling, mask SIMD exceptions
Now threads inherit their MXCSR (sans exception state bits) SIMD settings from their creator. By default, all exceptions are masked, and both "to zero" flags are set.
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@@ -145,6 +145,30 @@ isr_handler(cpu_state *regs)
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}
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break;
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case isr::isrSIMDFPE: {
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uint32_t mxcsr = 0;
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asm volatile ("stmxcsr %0" : "=m"(mxcsr));
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util::format({message, sizeof(message)},
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"SIMD Exception; MXCSR[%s%s%s%s%s%s%s%s%s%s%s%s%s%s rc:%d]",
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(mxcsr & 0x0001) ? " IE" : "",
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(mxcsr & 0x0002) ? " DE" : "",
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(mxcsr & 0x0004) ? " ZE" : "",
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(mxcsr & 0x0008) ? " OE" : "",
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(mxcsr & 0x0010) ? " UE" : "",
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(mxcsr & 0x0020) ? " PE" : "",
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(mxcsr & 0x0040) ? " DAZ" : "",
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(mxcsr & 0x0080) ? " IM" : "",
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(mxcsr & 0x0100) ? " DM" : "",
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(mxcsr & 0x0200) ? " ZM" : "",
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(mxcsr & 0x0400) ? " OM" : "",
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(mxcsr & 0x0800) ? " UM" : "",
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(mxcsr & 0x1000) ? " PM" : "",
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(mxcsr & 0x8000) ? " FTZ" : "",
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((mxcsr >> 13) & 0x3));
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kassert(false, message, regs);
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}
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break;
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case isr::isrSpurious:
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// No EOI for the spurious interrupt
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return;
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