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Increase to 64 IRQs

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This commit is contained in:
Justin C. Miller
2018-05-06 18:24:12 -07:00
parent d876aa141c
commit 9efb97c2a7
6 changed files with 113 additions and 70 deletions
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2
src/kernel/apic.cpp
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@@ -127,7 +127,7 @@ ioapic::ioapic(uint32_t *base, uint32_t base_gsi) :
for (uint8_t i = 0; i < m_num_gsi; ++i) {
uint16_t flags = (i < 0x10) ? 0 : 0xf;
isr vector = isr::irq0 + i;
isr vector = isr::irq00 + i;
redirect(i, vector, flags, true);
}
}

2
src/kernel/device_manager.cpp
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@@ -175,7 +175,7 @@ device_manager::load_apic(const acpi_apic *apic)
case 2: { // Interrupt source override
uint8_t source = kutil::read_from<uint8_t>(p+3);
isr gsi = isr::irq0 + kutil::read_from<uint32_t>(p+4);
isr gsi = isr::irq00 + kutil::read_from<uint32_t>(p+4);
uint16_t flags = kutil::read_from<uint16_t>(p+8);
log::debug(logs::devices, " Intr source override IRQ %d -> %d Pol %d Tri %d",

163
src/kernel/interrupt_isrs.inc
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@@ -1,64 +1,109 @@
ISR ( 0, isr0)
ISR ( 1, isr1)
ISR ( 2, isr2)
ISR ( 3, isr3)
ISR ( 4, isr4)
ISR ( 5, isr5)
ISR ( 6, isr6)
ISR ( 7, isr7)
EISR( 8, isr8)
ISR ( 9, isr9)
EISR(10, isr10)
EISR(11, isr11)
EISR(12, isr12)
EISR(13, isr13)
EISR(14, isr14)
ISR (15, isr15)
ISR (16, isr16)
ISR (17, isr17)
ISR (18, isr18)
ISR (19, isr19)
ISR (20, isr20)
ISR (21, isr21)
ISR (22, isr22)
ISR (23, isr23)
ISR (24, isr24)
ISR (25, isr25)
ISR (26, isr26)
ISR (27, isr27)
ISR (28, isr28)
ISR (29, isr29)
ISR (30, isr30)
ISR (31, isr31)
ISR (0x00, isrDivideByZero)
ISR (0x01, isrDebug)
ISR (0x02, isrNMI)
ISR (0x03, isrBreakpoint)
ISR (0x04, isrOverflow)
ISR (0x05, isrBRE)
ISR (0x06, isrInvalidOp)
ISR (0x07, isrDNA)
EISR(0x08, isrDoubleFault)
ISR (0x09, isrCoprocessor)
EISR(0x0a, isrInvalidTSS)
EISR(0x0b, isrSegmentNP)
EISR(0x0c, isrSSFault)
EISR(0x0d, isrGPFault)
EISR(0x0e, isrPageFault)
ISR (0x0f, isr15)
IRQ (64, 0, irq0)
IRQ (65, 1, irq1)
IRQ (66, 2, irq2)
IRQ (67, 3, irq3)
IRQ (68, 4, irq4)
IRQ (69, 5, irq5)
IRQ (70, 6, irq6)
IRQ (71, 7, irq7)
IRQ (72, 8, irq8)
IRQ (73, 9, irq9)
IRQ (74, 10, irq10)
IRQ (75, 11, irq11)
IRQ (76, 12, irq12)
IRQ (77, 13, irq13)
IRQ (78, 14, irq14)
IRQ (79, 15, irq15)
IRQ (80, 16, irq16)
IRQ (81, 17, irq17)
IRQ (82, 18, irq18)
IRQ (83, 19, irq19)
IRQ (84, 20, irq20)
IRQ (85, 21, irq21)
IRQ (86, 22, irq22)
ISR (0x10, isrX87FPE)
ISR (0x11, isrAlignmentChk)
ISR (0x12, isrMachineChk)
ISR (0x13, isrSIMDFPE)
ISR (0x14, isrVirt)
ISR (0x15, isr21)
ISR (0x16, isr22)
ISR (0x17, isr23)
ISR (0x18, isr24)
ISR (0x19, isr25)
ISR (0x1a, isr26)
ISR (0x1b, isr27)
ISR (0x1c, isr28)
ISR (0x1d, isr29)
ISR (0x1e, isrSecurity)
ISR (0x1f, isr31)
ISR (0x7c, isrTimer)
ISR (0x7d, isrLINT0)
ISR (0x7e, isrLINT1)
ISR (0x7f, isrSpurious)
IRQ (0x20, 0x00, irq00)
IRQ (0x21, 0x01, irq01)
IRQ (0x22, 0x02, irq02)
IRQ (0x23, 0x03, irq03)
IRQ (0x24, 0x04, irq04)
IRQ (0x25, 0x05, irq05)
IRQ (0x26, 0x06, irq06)
IRQ (0x27, 0x07, irq07)
IRQ (0x28, 0x08, irq08)
IRQ (0x29, 0x09, irq09)
IRQ (0x2a, 0x0a, irq0A)
IRQ (0x2b, 0x0b, irq0B)
IRQ (0x2c, 0x0c, irq0C)
IRQ (0x2d, 0x0d, irq0D)
IRQ (0x2e, 0x0e, irq0E)
IRQ (0x2f, 0x0f, irq0F)
IRQ (0x30, 0x10, irq10)
IRQ (0x31, 0x11, irq11)
IRQ (0x32, 0x12, irq12)
IRQ (0x33, 0x13, irq13)
IRQ (0x34, 0x14, irq14)
IRQ (0x35, 0x15, irq15)
IRQ (0x36, 0x16, irq16)
IRQ (0x37, 0x17, irq17)
IRQ (0x38, 0x18, irq18)
IRQ (0x39, 0x19, irq19)
IRQ (0x3a, 0x1a, irq1A)
IRQ (0x3b, 0x1b, irq1B)
IRQ (0x3c, 0x1c, irq1C)
IRQ (0x3d, 0x1d, irq1D)
IRQ (0x3e, 0x1e, irq1E)
IRQ (0x3f, 0x1f, irq1F)
IRQ (0x40, 0x20, irq20)
IRQ (0x41, 0x21, irq21)
IRQ (0x42, 0x22, irq22)
IRQ (0x43, 0x23, irq23)
IRQ (0x44, 0x24, irq24)
IRQ (0x45, 0x25, irq25)
IRQ (0x46, 0x26, irq26)
IRQ (0x47, 0x27, irq27)
IRQ (0x48, 0x28, irq28)
IRQ (0x49, 0x29, irq29)
IRQ (0x4a, 0x2a, irq2A)
IRQ (0x4b, 0x2b, irq2B)
IRQ (0x4c, 0x2c, irq2C)
IRQ (0x4d, 0x2d, irq2D)
IRQ (0x4e, 0x2e, irq2E)
IRQ (0x4f, 0x2f, irq2F)
IRQ (0x50, 0x30, irq30)
IRQ (0x51, 0x31, irq31)
IRQ (0x52, 0x32, irq32)
IRQ (0x53, 0x33, irq33)
IRQ (0x54, 0x34, irq34)
IRQ (0x55, 0x35, irq35)
IRQ (0x56, 0x36, irq36)
IRQ (0x57, 0x37, irq37)
IRQ (0x58, 0x38, irq38)
IRQ (0x59, 0x39, irq39)
IRQ (0x5a, 0x3a, irq3A)
IRQ (0x5b, 0x3b, irq3B)
IRQ (0x5c, 0x3c, irq3C)
IRQ (0x5d, 0x3d, irq3D)
IRQ (0x5e, 0x3e, irq3E)
IRQ (0x5f, 0x3f, irq3F)
ISR (0xec, isrTimer)
ISR (0xed, isrLINT0)
ISR (0xee, isrLINT1)
ISR (0xef, isrSpurious)
ISR (0xf0, isrIgnore0)
ISR (0xf1, isrIgnore1)

11
src/kernel/interrupts.cpp
View File

@@ -147,7 +147,7 @@ disable_legacy_pic()
// Remap into ignore ISRs
outb(PIC1+1, static_cast<uint8_t>(isr::isrIgnore0)); io_wait();
outb(PIC2+1, static_cast<uint8_t>(isr::isrIgnore8)); io_wait();
outb(PIC2+1, static_cast<uint8_t>(isr::isrIgnore0)); io_wait();
// Tell PICs about each other
outb(PIC1+1, 0x04); io_wait();
@@ -236,14 +236,7 @@ isr_handler(registers regs)
case isr::isrIgnore5:
case isr::isrIgnore6:
case isr::isrIgnore7:
case isr::isrIgnore8:
case isr::isrIgnore9:
case isr::isrIgnoreA:
case isr::isrIgnoreB:
case isr::isrIgnoreC:
case isr::isrIgnoreD:
case isr::isrIgnoreE:
case isr::isrIgnoreF:
/*
cons->printf("\nIGNORED PIC INTERRUPT %d\n",
(regs.interrupt % 0xff) - 0xf0);

1
src/kernel/interrupts.s
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@@ -118,4 +118,5 @@ irq_handler_prelude:
%define ISR(i, name) EMIT_ISR name, i
%define IRQ(i, q, name) EMIT_IRQ name, i
section .isrs
%include "interrupt_isrs.inc"