justin/jsix_import
1
0
Fork 0
Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity

[kernel] Fix SMP boot on KVM

Browse Source 
KVM didn't like setting all the CR4 bits we wanted at once. I suspect
that means real hardware won't either. Delay the setting of the rest of
CR4 until after the CPU is in long mode - only set PAE and PGE from real
mode.
This commit is contained in:
Justin C. Miller
2021-02-13 01:45:17 -08:00
parent 36da65e15b
commit 2a347942bc
4 changed files with 55 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
src/kernel/apic.cpp
View File

@@ -70,16 +70,32 @@ lapic::get_id()
}
void
lapic::send_ipi(ipi_mode mode, uint8_t vector, uint8_t dest)
lapic::send_ipi(ipi mode, uint8_t vector, uint8_t dest)
{
// Wait until the APIC is ready to send
ipi_wait();
apic_write(m_base, lapic_icr_high, static_cast<uint32_t>(dest) << 24);
uint32_t command =
static_cast<uint32_t>(vector) |
static_cast<uint32_t>(mode) << 8;
static_cast<uint32_t>(mode);
apic_write(m_base, lapic_icr_high, static_cast<uint32_t>(dest) << 24);
apic_write(m_base, lapic_icr_low, command);
}
void
lapic::send_ipi_broadcast(ipi mode, bool self, uint8_t vector)
{
// Wait until the APIC is ready to send
ipi_wait();
uint32_t command =
static_cast<uint32_t>(vector) |
static_cast<uint32_t>(mode) |
(self ? 0 : (1 << 18)) |
(1 << 19);
apic_write(m_base, lapic_icr_high, 0);
apic_write(m_base, lapic_icr_low, command);
}