Add some AHCI debugging dumps
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@@ -62,6 +62,8 @@ hba::hba(pci_device *device)
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device_manager &dm = device_manager::get();
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device_manager &dm = device_manager::get();
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uint32_t bar5 = device->get_bar(5);
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uint32_t bar5 = device->get_bar(5);
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log::debug(logs::driver, "HBA raw BAR5 is %08lx", bar5);
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m_data = reinterpret_cast<hba_data *>(bar5 & ~0xfffull);
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m_data = reinterpret_cast<hba_data *>(bar5 & ~0xfffull);
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pm->map_offset_pointer(reinterpret_cast<void **>(&m_data), 0x2000);
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pm->map_offset_pointer(reinterpret_cast<void **>(&m_data), 0x2000);
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@@ -93,6 +95,7 @@ hba::hba(pci_device *device)
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m_data->host_control |= 0x02; // enable interrupts
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m_data->host_control |= 0x02; // enable interrupts
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}
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}
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dump();
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for (auto &p : m_ports) {
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for (auto &p : m_ports) {
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if (!p.active()) continue;
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if (!p.active()) continue;
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@@ -301,11 +301,17 @@ port::read_async(uint64_t offset, size_t length, void *dest)
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size_t
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size_t
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port::read(uint64_t offset, size_t length, void *dest)
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port::read(uint64_t offset, size_t length, void *dest)
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{
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{
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dump();
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int slot = read_async(offset, length, dest);
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int slot = read_async(offset, length, dest);
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dump();
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int timeout = 0;
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int timeout = 0;
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while (m_pending[slot].type == command_type::read) {
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while (m_pending[slot].type == command_type::read) {
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if (timeout++ > 10) return 0;
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if (timeout++ > 5) {
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m_hba->dump();
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dump();
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return 0;
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}
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asm("hlt");
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asm("hlt");
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}
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}
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kassert(m_pending[slot].type == command_type::finished,
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kassert(m_pending[slot].type == command_type::finished,
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@@ -97,21 +97,25 @@ pci_device::pci_device(pci_group &group, uint8_t bus, uint8_t device, uint8_t fu
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uint16_t *command = reinterpret_cast<uint16_t *>(&m_base[1]);
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uint16_t *command = reinterpret_cast<uint16_t *>(&m_base[1]);
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*command |= 0x400; // Mask old INTx style interrupts
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*command |= 0x400; // Mask old INTx style interrupts
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uint16_t *status = command + 1;
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log::info(logs::device, "Found PCIe device at %02d:%02d:%d of type %d.%d id %04x:%04x",
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log::info(logs::device, "Found PCIe device at %02d:%02d:%d of type %d.%d id %04x:%04x",
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bus, device, func, m_class, m_subclass, m_vendor, m_device);
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bus, device, func, m_class, m_subclass, m_vendor, m_device);
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// Walk the extended capabilities list
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if (*status & 0x0010) {
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uint8_t next = m_base[13] & 0xff;
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// Walk the extended capabilities list
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while (next) {
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uint8_t next = m_base[13] & 0xff;
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pci_cap *cap = reinterpret_cast<pci_cap *>(kutil::offset_pointer(m_base, next));
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while (next) {
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next = cap->next;
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pci_cap *cap = reinterpret_cast<pci_cap *>(kutil::offset_pointer(m_base, next));
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log::debug(logs::device, " - found PCI cap type %02x", cap->id);
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next = cap->next;
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log::debug(logs::device, " - found PCI cap type %02x", cap->id);
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if (cap->id == pci_cap::type::msi) {
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if (cap->id == pci_cap::type::msi) {
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m_msi = cap;
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m_msi = cap;
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pci_cap_msi *mcap = reinterpret_cast<pci_cap_msi *>(cap);
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pci_cap_msi *mcap = reinterpret_cast<pci_cap_msi *>(cap);
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mcap->control &= ~0x70; // at most 1 vector allocated
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mcap->control &= ~0x70; // at most 1 vector allocated
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mcap->control |= 0x01; // Enable interrupts, at most 1 vector allocated
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mcap->control |= 0x01; // Enable interrupts, at most 1 vector allocated
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}
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}
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}
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}
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}
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}
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}
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