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68a2250886
We started actually running up against the page boundary for kernel stacks and thus double-faulting on page faults from kernel space. So I finally added IST stacks. Note that we currently just increment/decrement the IST entry by a page when we enter the handler to avoid clobbering on re-entry, but this means: * these handlers need to be able to operate with only a page of stack * kernel stacks always have to be >1 pages * the amount of nesting possible is tied to the kernel stack size. These seem fine for now, but we should maybe find a way to use something besides g_kernel_stacks to set up the IST stacks if/when this becomes an issue.
35 lines
745 B
C
35 lines
745 B
C
#pragma once
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/// \file interrupts.h
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/// Free functions and definitions related to interrupt service vectors
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#include <stdint.h>
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/// Enum of all defined ISR/IRQ vectors
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enum class isr : uint8_t
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{
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#define ISR(i, s, name) name = i,
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#define EISR(i, s, name) name = i,
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#define IRQ(i, q, name) name = i,
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#include "interrupt_isrs.inc"
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#undef IRQ
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#undef EISR
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#undef ISR
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_zero = 0
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};
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/// Helper operator to add an offset to an isr vector
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isr operator+(const isr &lhs, int rhs);
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extern "C" {
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/// Set the CPU interrupt enable flag (sti)
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void interrupts_enable();
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/// Set the CPU interrupt disable flag (cli)
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void interrupts_disable();
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}
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/// Fill the IDT with our ISRs, and disable the legacy
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/// PIC interrupts.
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void interrupts_init();
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