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2d6987341c
The idle threads for the APs have intentionally tiny stacks. Logging is currently an absolute hog of stack space, so avoid logging on the idle stacks as much as possible. Eventually we should instead just reclaim the physical pages used by most of the stack instead of making them tiny.
312 lines
7.2 KiB
C++
312 lines
7.2 KiB
C++
#include "kutil/assert.h"
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#include "apic.h"
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#include "clock.h"
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#include "interrupts.h"
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#include "io.h"
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#include "kernel_memory.h"
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#include "log.h"
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uint64_t lapic::s_ticks_per_us = 0;
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static constexpr uint16_t lapic_id = 0x0020;
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static constexpr uint16_t lapic_spurious = 0x00f0;
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static constexpr uint16_t lapic_icr_low = 0x0300;
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static constexpr uint16_t lapic_icr_high = 0x0310;
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static constexpr uint16_t lapic_lvt_timer = 0x0320;
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static constexpr uint16_t lapic_lvt_lint0 = 0x0350;
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static constexpr uint16_t lapic_lvt_lint1 = 0x0360;
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static constexpr uint16_t lapic_lvt_error = 0x0370;
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static constexpr uint16_t lapic_timer_init = 0x0380;
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static constexpr uint16_t lapic_timer_cur = 0x0390;
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static constexpr uint16_t lapic_timer_div = 0x03e0;
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static uint32_t
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apic_read(uint32_t volatile *apic, uint16_t offset)
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{
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return *(apic + offset/sizeof(uint32_t));
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}
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static void
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apic_write(uint32_t volatile *apic, uint16_t offset, uint32_t value)
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{
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log::debug(logs::apic, "LAPIC write: %x = %08lx", offset, value);
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*(apic + offset/sizeof(uint32_t)) = value;
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}
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static uint32_t
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ioapic_read(uint32_t volatile *base, uint8_t reg)
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{
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*base = reg;
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return *(base + 4);
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}
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static void
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ioapic_write(uint32_t volatile *base, uint8_t reg, uint32_t value)
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{
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*base = reg;
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*(base + 4) = value;
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}
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apic::apic(uintptr_t base) :
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m_base(memory::to_virtual<uint32_t>(base))
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{
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}
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lapic::lapic(uintptr_t base) :
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apic(base),
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m_divisor(0)
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{
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apic_write(m_base, lapic_lvt_error, static_cast<uint32_t>(isr::isrAPICError));
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apic_write(m_base, lapic_spurious, static_cast<uint32_t>(isr::isrSpurious));
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}
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uint8_t
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lapic::get_id()
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{
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return static_cast<uint8_t>(apic_read(m_base, lapic_id) >> 24);
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}
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void
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lapic::send_ipi(ipi mode, uint8_t vector, uint8_t dest)
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{
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// Wait until the APIC is ready to send
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ipi_wait();
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uint32_t command =
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static_cast<uint32_t>(vector) |
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static_cast<uint32_t>(mode);
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apic_write(m_base, lapic_icr_high, static_cast<uint32_t>(dest) << 24);
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apic_write(m_base, lapic_icr_low, command);
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}
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void
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lapic::send_ipi_broadcast(ipi mode, bool self, uint8_t vector)
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{
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// Wait until the APIC is ready to send
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ipi_wait();
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uint32_t command =
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static_cast<uint32_t>(vector) |
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static_cast<uint32_t>(mode) |
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(self ? 0 : (1 << 18)) |
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(1 << 19);
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apic_write(m_base, lapic_icr_high, 0);
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apic_write(m_base, lapic_icr_low, command);
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}
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void
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lapic::ipi_wait()
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{
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while (apic_read(m_base, lapic_icr_low) & (1<<12))
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asm volatile ("pause" : : : "memory");
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}
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void
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lapic::calibrate_timer()
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{
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interrupts_disable();
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log::info(logs::apic, "Calibrating APIC timer...");
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const uint32_t initial = -1u;
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enable_timer(isr::isrSpurious);
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set_divisor(1);
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apic_write(m_base, lapic_timer_init, initial);
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uint64_t us = 20000;
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clock::get().spinwait(us);
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uint32_t remaining = apic_read(m_base, lapic_timer_cur);
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uint64_t ticks_total = initial - remaining;
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s_ticks_per_us = ticks_total / us;
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log::info(logs::apic, "APIC timer ticks %d times per microsecond.", s_ticks_per_us);
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interrupts_enable();
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}
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void
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lapic::set_divisor(uint8_t divisor)
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{
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uint32_t divbits = 0;
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switch (divisor) {
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case 1: divbits = 0xb; break;
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case 2: divbits = 0x0; break;
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case 4: divbits = 0x1; break;
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case 8: divbits = 0x2; break;
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case 16: divbits = 0x3; break;
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case 32: divbits = 0x8; break;
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case 64: divbits = 0x9; break;
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case 128: divbits = 0xa; break;
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default:
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kassert(0, "Invalid divisor passed to lapic::set_divisor");
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}
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apic_write(m_base, lapic_timer_div, divbits);
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m_divisor = divisor;
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}
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void
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lapic::enable_timer(isr vector, bool repeat)
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{
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uint32_t lvte = static_cast<uint8_t>(vector);
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if (repeat)
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lvte |= 0x20000;
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apic_write(m_base, lapic_lvt_timer, lvte);
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log::debug(logs::apic, "Enabling APIC timer at isr %02x", vector);
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}
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uint32_t
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lapic::reset_timer(uint64_t interval)
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{
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uint64_t remaining = ticks_to_us(apic_read(m_base, lapic_timer_cur));
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uint64_t ticks = us_to_ticks(interval);
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int divisor = 1;
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while (ticks > 0xffffffffull) {
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ticks >>= 1;
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divisor <<= 1;
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}
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if (divisor != m_divisor)
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set_divisor(divisor);
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apic_write(m_base, lapic_timer_init, ticks);
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return remaining;
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}
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void
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lapic::enable_lint(uint8_t num, isr vector, bool nmi, uint16_t flags)
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{
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kassert(num == 0 || num == 1, "Invalid LINT passed to lapic::enable_lint.");
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uint16_t off = num ? lapic_lvt_lint1 : lapic_lvt_lint0;
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uint32_t lvte = static_cast<uint8_t>(vector);
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uint16_t polarity = flags & 0x3;
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if (polarity == 3)
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lvte |= (1 << 13);
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uint16_t trigger = (flags >> 2) & 0x3;
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if (trigger == 3)
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lvte |= (1 << 15);
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apic_write(m_base, off, lvte);
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log::debug(logs::apic, "APIC LINT%d enabled as %s %d %s-triggered, active %s.",
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num, nmi ? "NMI" : "ISR", vector,
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polarity == 3 ? "level" : "edge",
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trigger == 3 ? "low" : "high");
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}
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void
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lapic::enable()
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{
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apic_write(m_base, lapic_spurious,
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apic_read(m_base, lapic_spurious) | 0x100);
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log::debug(logs::apic, "LAPIC enabled!");
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}
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void
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lapic::disable()
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{
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apic_write(m_base, lapic_spurious,
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apic_read(m_base, lapic_spurious) & ~0x100);
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log::debug(logs::apic, "LAPIC disabled.");
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}
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ioapic::ioapic(uintptr_t base, uint32_t base_gsi) :
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apic(base),
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m_base_gsi(base_gsi)
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{
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uint32_t id = ioapic_read(m_base, 0);
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uint32_t version = ioapic_read(m_base, 1);
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m_id = (id >> 24) & 0xff;
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m_version = version & 0xff;
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m_num_gsi = (version >> 16) & 0xff;
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log::debug(logs::apic, "IOAPIC %d loaded, version %d, GSIs %d-%d",
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m_id, m_version, base_gsi, base_gsi + (m_num_gsi - 1));
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for (uint8_t i = 0; i < m_num_gsi; ++i) {
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uint16_t flags = (i < 0x10) ? 0 : 0xf;
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isr vector = isr::irq00 + i;
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redirect(i, vector, flags, true);
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}
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}
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void
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ioapic::redirect(uint8_t irq, isr vector, uint16_t flags, bool masked)
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{
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log::debug(logs::apic, "IOAPIC %d redirecting irq %3d to vector %3d [%04x]%s",
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m_id, irq, vector, flags, masked ? " (masked)" : "");
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uint64_t entry = static_cast<uint64_t>(vector);
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uint16_t polarity = flags & 0x3;
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if (polarity == 3)
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entry |= (1 << 13);
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uint16_t trigger = (flags >> 2) & 0x3;
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if (trigger == 3)
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entry |= (1 << 15);
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if (masked)
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entry |= (1 << 16);
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ioapic_write(m_base, (2 * irq) + 0x10, static_cast<uint32_t>(entry & 0xffffffff));
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ioapic_write(m_base, (2 * irq) + 0x11, static_cast<uint32_t>(entry >> 32));
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}
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void
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ioapic::mask(uint8_t irq, bool masked)
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{
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log::debug(logs::apic, "IOAPIC %d %smasking irq %3d",
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m_id, masked ? "" : "un", irq);
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uint32_t entry = ioapic_read(m_base, (2 * irq) + 0x10);
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if (masked)
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entry |= (1 << 16);
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else
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entry &= ~(1 << 16);
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ioapic_write(m_base, (2 * irq) + 0x10, entry);
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}
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void
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ioapic::dump_redirs() const
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{
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log::debug(logs::apic, "IOAPIC %d redirections:", m_id);
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for (uint8_t i = 0; i < m_num_gsi; ++i) {
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uint64_t low = ioapic_read(m_base, 0x10 + (2 *i));
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uint64_t high = ioapic_read(m_base, 0x10 + (2 *i));
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uint64_t redir = low | (high << 32);
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if (redir == 0) continue;
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uint8_t vector = redir & 0xff;
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uint8_t mode = (redir >> 8) & 0x7;
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uint8_t dest_mode = (redir >> 11) & 0x1;
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uint8_t polarity = (redir >> 13) & 0x1;
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uint8_t trigger = (redir >> 15) & 0x1;
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uint8_t mask = (redir >> 16) & 0x1;
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uint8_t dest = (redir >> 56) & 0xff;
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log::debug(logs::apic, " %2d: vec %3d %s active, %s-triggered %s dest %d: %x",
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m_base_gsi + i, vector,
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polarity ? "low" : "high",
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trigger ? "level" : "edge",
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mask ? "masked" : "",
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dest_mode,
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dest);
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}
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}
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