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https://github.com/justinian/jsix.git
synced 2025-12-10 08:24:32 -08:00
11b61ab345
The kernel log levels are now numerically reversed so that more-verbose levels can be added to the end. Replaced 'debug' with 'verbose', and added new 'spam' level.
119 lines
3.8 KiB
C++
119 lines
3.8 KiB
C++
#include "assert.h"
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#include "device_manager.h"
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#include "hpet.h"
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#include "io.h"
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#include "logger.h"
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namespace {
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inline uint64_t volatile *capabilities(uint64_t volatile *base) { return base; }
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inline uint64_t volatile *configuration(uint64_t volatile *base) { return base+2; }
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inline uint64_t volatile *interrupt_status(uint64_t volatile *base) { return base+4; }
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inline uint64_t volatile *counter_value(uint64_t volatile *base) { return base+30; }
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inline uint64_t volatile *timer_base(uint64_t volatile *base, unsigned i) { return base + 0x20 + (4*i); }
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inline uint64_t volatile *timer_config(uint64_t volatile *base, unsigned i) { return timer_base(base, i); }
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inline uint64_t volatile *timer_comparator(uint64_t volatile *base, unsigned i) { return timer_base(base, i) + 1; }
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}
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void
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hpet_irq_callback(void *hpet_ptr)
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{
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if (hpet_ptr)
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reinterpret_cast<hpet*>(hpet_ptr)->callback();
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}
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hpet::hpet(uint8_t index, uint64_t *base) :
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m_index(index),
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m_base(base)
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{
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*configuration(m_base) = 0;
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*counter_value(m_base) = 0;
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uint64_t caps = *capabilities(base);
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uint64_t config = *configuration(base);
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m_timers = ((caps >> 8) & 0x1f) + 1;
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m_period = (caps >> 32);
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setup_timer_interrupts(0, 2, 1000, true);
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// bool installed = device_manager::get()
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// .install_irq(2, "HPET Timer", hpet_irq_callback, this);
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// kassert(installed, "Installing HPET IRQ handler");
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log::spam(logs::timer, "HPET %d capabilities:", index);
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log::spam(logs::timer, " revision: %d", caps & 0xff);
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log::spam(logs::timer, " timers: %d", m_timers);
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log::spam(logs::timer, " bits: %d", ((caps >> 13) & 1) ? 64 : 32);
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log::spam(logs::timer, " LRR capable: %d", ((caps >> 15) & 1));
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log::spam(logs::timer, " period: %dns", m_period / 1000000);
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log::spam(logs::timer, " global enabled: %d", config & 1);
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log::spam(logs::timer, " LRR enable: %d", (config >> 1) & 1);
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for (unsigned i = 0; i < m_timers; ++i) {
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disable_timer(i);
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uint64_t config = *timer_config(m_base, i);
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log::spam(logs::timer, "HPET %d timer %d:", index, i);
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log::spam(logs::timer, " int type: %d", (config >> 1) & 1);
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log::spam(logs::timer, " int enable: %d", (config >> 2) & 1);
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log::spam(logs::timer, " timer type: %d", (config >> 3) & 1);
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log::spam(logs::timer, " periodic cap: %d", (config >> 4) & 1);
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log::spam(logs::timer, " bits: %d", ((config >> 5) & 1) ? 64 : 32);
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log::spam(logs::timer, " 32 mode: %d", (config >> 8) & 1);
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log::spam(logs::timer, " int route: %d", (config >> 9) & 0x1f);
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log::spam(logs::timer, " FSB enable: %d", (config >> 14) & 1);
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log::spam(logs::timer, " FSB capable: %d", (config >> 15) & 1);
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log::spam(logs::timer, " rotung cap: %08x", (config >> 32));
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}
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}
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void
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hpet::setup_timer_interrupts(unsigned timer, uint8_t irq, uint64_t interval, bool periodic)
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{
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constexpr uint64_t femto_per_us = 1000000000ull;
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*timer_comparator(m_base, timer) =
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*counter_value(m_base) +
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(interval * femto_per_us) / m_period;
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*timer_config(m_base, timer) = (irq << 9) | ((periodic ? 1 : 0) << 3);
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}
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void
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hpet::enable_timer(unsigned timer)
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{
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*timer_config(m_base, timer) = *timer_config(m_base, timer) | (1 << 2);
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}
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void
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hpet::disable_timer(unsigned timer)
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{
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*timer_config(m_base, timer) = *timer_config(m_base, timer) & ~(1ull << 2);
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}
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void
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hpet::callback()
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{
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log::spam(logs::timer, "HPET %d got irq", m_index);
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}
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void
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hpet::enable()
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{
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log::verbose(logs::timer, "HPET %d enabling", m_index);
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*configuration(m_base) = (*configuration(m_base) & 0x3) | 1;
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}
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uint64_t
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hpet::value() const
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{
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return *counter_value(m_base);
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}
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uint64_t
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hpet_clock_source(void *data)
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{
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return reinterpret_cast<hpet*>(data)->value();
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}
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