Make interrupt_isrs.inc the one source of ISRs

Makefile

@@ -169,7 +169,7 @@ $(BUILD_D)/boot.dump: $(BUILD_D)/boot.efi
 	$(OBJD) -D -S $< > $@
 
 $(BUILD_D)/boot/%.s.o: src/boot/%.s $(BUILD_D)/versions.s $(INIT_DEP)
-	$(AS) $(ASFLAGS) -o $@ $<
+	$(AS) $(ASFLAGS) -i src/boot/ -o $@ $<
 
 $(BUILD_D)/boot/%.c.o: src/boot/%.c $(INIT_DEP)
 	$(CC) $(BOOT_CFLAGS) -c -o $@ $<
@@ -182,7 +182,7 @@ $(BUILD_D)/kernel.dump: $(BUILD_D)/kernel.elf
 	$(OBJD) -D -S $< > $@
 
 $(BUILD_D)/arch/%.s.o: $(ARCH_D)/%.s $(BUILD_D)/versions.s $(INIT_DEP)
-	$(AS) $(ASFLAGS) -o $@ $<
+	$(AS) $(ASFLAGS) -i $(ARCH_D)/ -o $@ $<
 
 $(BUILD_D)/arch/%.c.o: $(ARCH_D)/%.c $(INIT_DEP)
 	$(CC) $(CFLAGS) -c -o $@ $<

modules.mk

@@ -29,7 +29,7 @@ $(MOD_BUILD_D)/%.cpp.o: $(MOD_SRC_D)/%.cpp $(INIT_DEP)
 	$(CXX) $(CXXFLAGS) -c -o $@ $<
 
 $(MOD_BUILD_D)/%.s.o: $(MOD_SRC_D)/%.s $(BUILD_D)/versions.s $(INIT_DEP)
-	$(AS) $(ASFLAGS) -o $@ $<
+	$(AS) $(ASFLAGS) -i $(MOD_SRC_D)/ -o $@ $<
 
 DEPS += $(patsubst %.o,%.d,$(OBJS_$(MOD_NAME)))
 

src/modules/main/interrupt_isrs.inc

@@ -6,13 +6,13 @@ ISR( 4, isr4);
 ISR ( 5, isr5);
 ISR ( 6, isr6);
 ISR ( 7, isr7);
-ISR( 8, isr8);
+EISR( 8, isr8);
 ISR ( 9, isr9);
-ISR(10, isr10);
+EISR(10, isr10);
-ISR(11, isr11);
+EISR(11, isr11);
-ISR(12, isr12);
+EISR(12, isr12);
-ISR(13, isr13);
+EISR(13, isr13);
-ISR(14, isr14);
+EISR(14, isr14);
 ISR (15, isr15);
 ISR (16, isr16);
 ISR (17, isr17);
@@ -30,3 +30,22 @@ ISR(28, isr28);
 ISR (29, isr29);
 ISR (30, isr30);
 ISR (31, isr31);
+
+IRQ (64,  0, irq0);
+IRQ (65,  1, irq1);
+IRQ (66,  2, irq2);
+IRQ (67,  3, irq3);
+IRQ (68,  4, irq4);
+IRQ (69,  5, irq5);
+IRQ (70,  6, irq6);
+IRQ (71,  7, irq7);
+IRQ (72,  8, irq8);
+IRQ (73,  9, irq9);
+IRQ (74, 10, irq10);
+IRQ (75, 11, irq11);
+IRQ (76, 12, irq12);
+IRQ (77, 13, irq13);
+IRQ (78, 14, irq14);
+IRQ (79, 15, irq15);
+
+ISR (0xff, isrSpurious);

src/modules/main/interrupts.cpp

@@ -68,9 +68,14 @@ extern "C" {
 	void gdt_load();
 
 	void isr_handler(registers);
+	void irq_handler(registers);
 
 #define ISR(i, name)     extern void name ()
+#define EISR(i, name)    extern void name ()
+#define IRQ(i, q, name)  extern void name ()
 #include "interrupt_isrs.inc"
+#undef IRQ
+#undef EISR
 #undef ISR
 }
 
@@ -131,7 +136,11 @@ interrupts_init()
 	g_idtr.base = reinterpret_cast<uint64_t>(&g_idt_table);
 
 #define ISR(i, name)     set_idt_entry(i, reinterpret_cast<uint64_t>(& name), 0x38, 0x8e);
+#define EISR(i, name)    set_idt_entry(i, reinterpret_cast<uint64_t>(& name), 0x38, 0x8e);
+#define IRQ(i, q, name)  set_idt_entry(i, reinterpret_cast<uint64_t>(& name), 0x38, 0x8e);
 #include "interrupt_isrs.inc"
+#undef IRQ
+#undef EISR
 #undef ISR
 
 	idt_write();
@@ -145,17 +154,47 @@ struct registers
 	uint64_t rip, cs, eflags, user_esp, ss;
 };
 
+#define print_reg(name, value) \
+	cons->puts("         " name ": "); \
+	cons->put_hex((value)); \
+	cons->puts("\n");
+
 void
 isr_handler(registers regs)
 {
 	console *cons = console::get();
 
-	cons->puts("received interrupt:\n");
+	cons->puts("received ISR interrupt:\n");
 
-#define print_reg(name, value) \
+	print_reg("ISR", regs.interrupt);
-	cons->puts("         " name ": "); \
+	print_reg("ERR", regs.errorcode);
-	cons->put_hex((value)); \
+	console::get()->puts("\n");
-	cons->puts("\n");
+
+	print_reg(" ds", regs.ds);
+	print_reg("rdi", regs.rdi);
+	print_reg("rsi", regs.rsi);
+	print_reg("rbp", regs.rbp);
+	print_reg("rsp", regs.rsp);
+	print_reg("rbx", regs.rbx);
+	print_reg("rdx", regs.rdx);
+	print_reg("rcx", regs.rcx);
+	print_reg("rax", regs.rax);
+	console::get()->puts("\n");
+
+	print_reg("rip", regs.rip);
+	print_reg(" cs", regs.cs);
+	print_reg(" ef", regs.eflags);
+	print_reg("esp", regs.user_esp);
+	print_reg(" ss", regs.ss);
+	while(1) asm("hlt");
+}
+
+void
+irq_handler(registers regs)
+{
+	console *cons = console::get();
+
+	cons->puts("received IRQ interrupt:\n");
 
 	print_reg("ISR", regs.interrupt);
 	print_reg("ERR", regs.errorcode);

src/modules/main/interrupts.s

@@ -21,59 +21,7 @@ gdt_load:
 	sgdt [g_gdtr]
 	ret
 
-%macro ISR_NOERRCODE 1
+%macro push_all_and_segments 0
-	global isr%1
-	isr%1:
-		cli
-		push byte 0
-		push byte %1
-		jmp isr_handler_prelude
-%endmacro
-
-%macro ISR_ERRCODE 1
-	global isr%1
-	isr%1:
-		cli
-		push byte %1
-		jmp isr_handler_prelude
-%endmacro
-
-ISR_NOERRCODE  0
-ISR_NOERRCODE  1
-ISR_NOERRCODE  2
-ISR_NOERRCODE  3
-ISR_NOERRCODE  4
-ISR_NOERRCODE  5
-ISR_NOERRCODE  6
-ISR_NOERRCODE  7
-ISR_ERRCODE    8
-ISR_NOERRCODE  9
-ISR_ERRCODE   10
-ISR_ERRCODE   11
-ISR_ERRCODE   12
-ISR_ERRCODE   13
-ISR_ERRCODE   14
-ISR_NOERRCODE 15
-ISR_NOERRCODE 16
-ISR_NOERRCODE 17
-ISR_NOERRCODE 18
-ISR_NOERRCODE 19
-ISR_NOERRCODE 20
-ISR_NOERRCODE 21
-ISR_NOERRCODE 22
-ISR_NOERRCODE 23
-ISR_NOERRCODE 24
-ISR_NOERRCODE 25
-ISR_NOERRCODE 26
-ISR_NOERRCODE 27
-ISR_NOERRCODE 28
-ISR_NOERRCODE 29
-ISR_NOERRCODE 30
-ISR_NOERRCODE 31
-
-extern isr_handler
-global isr_handler_prelude
-isr_handler_prelude:
 	push rax
 	push rcx
 	push rdx
@@ -83,17 +31,11 @@ isr_handler_prelude:
 	push rsi
 	push rdi
 
-	mov ax, ds		; Save the data segment register
+	mov ax, ds
 	push rax
+%endmacro
 
-	mov ax, 0x10	; load the kernel data segment
+%macro pop_all_and_segments 0
-	mov ds, ax
-	mov es, ax
-	mov fs, ax
-	mov gs, ax
-
-	call isr_handler
-
 	pop rax
 	mov ds, ax
 	mov es, ax
@@ -108,7 +50,72 @@ isr_handler_prelude:
 	pop rdx
 	pop rcx
 	pop rax
+%endmacro
+
+%macro load_kernel_segments 0
+	mov ax, 0x10	; load the kernel data segment
+	mov ds, ax
+	mov es, ax
+	mov fs, ax
+	mov gs, ax
+%endmacro
+
+extern isr_handler
+global isr_handler_prelude
+isr_handler_prelude:
+	push_all_and_segments
+	load_kernel_segments
+
+	call isr_handler
+
+	pop_all_and_segments
 
 	add rsp, 16		; because the ISRs added err/num
 	sti
 	iretq
+
+extern irq_handler
+global irq_handler_prelude
+irq_handler_prelude:
+	push_all_and_segments
+	load_kernel_segments
+
+	call irq_handler
+
+	pop_all_and_segments
+
+	add rsp, 16		; because the ISRs added err/num
+	sti
+	iretq
+
+%macro EMIT_ISR 2
+	global %1
+	%1:
+		cli
+		push byte 0
+		push byte %2
+		jmp isr_handler_prelude
+%endmacro
+
+%macro EMIT_EISR 2
+	global %1
+	%1:
+		cli
+		push byte %2
+		jmp isr_handler_prelude
+%endmacro
+
+%macro EMIT_IRQ 2
+	global %1
+	%1:
+		cli
+		push byte 0
+		push byte %2
+		jmp irq_handler_prelude
+%endmacro
+
+%define EISR(i, name)     EMIT_EISR name, i
+%define  ISR(i, name)     EMIT_ISR name, i
+%define  IRQ(i, q, name)  EMIT_IRQ name, i
+
+%include "interrupt_isrs.inc"