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Add some AHCI debugging dumps

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This commit is contained in:
Justin C. Miller
2018-05-20 02:02:06 -07:00
parent 81fc559802
commit 193d9939f0
3 changed files with 25 additions and 12 deletions
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3
src/kernel/ahci/hba.cpp
View File

@@ -62,6 +62,8 @@ hba::hba(pci_device *device)
device_manager &dm = device_manager::get(); device_manager &dm = device_manager::get();
uint32_t bar5 = device->get_bar(5); uint32_t bar5 = device->get_bar(5);
log::debug(logs::driver, "HBA raw BAR5 is %08lx", bar5);
m_data = reinterpret_cast<hba_data *>(bar5 & ~0xfffull); m_data = reinterpret_cast<hba_data *>(bar5 & ~0xfffull);
pm->map_offset_pointer(reinterpret_cast<void **>(&m_data), 0x2000); pm->map_offset_pointer(reinterpret_cast<void **>(&m_data), 0x2000);
@@ -93,6 +95,7 @@ hba::hba(pci_device *device)
m_data->host_control |= 0x02; // enable interrupts m_data->host_control |= 0x02; // enable interrupts
} }
dump();
for (auto &p : m_ports) { for (auto &p : m_ports) {
if (!p.active()) continue; if (!p.active()) continue;

8
src/kernel/ahci/port.cpp
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@@ -301,11 +301,17 @@ port::read_async(uint64_t offset, size_t length, void *dest)
size_t size_t
port::read(uint64_t offset, size_t length, void *dest) port::read(uint64_t offset, size_t length, void *dest)
{ {
dump();
int slot = read_async(offset, length, dest); int slot = read_async(offset, length, dest);
dump();
int timeout = 0; int timeout = 0;
while (m_pending[slot].type == command_type::read) { while (m_pending[slot].type == command_type::read) {
if (timeout++ > 10) return 0; if (timeout++ > 5) {
m_hba->dump();
dump();
return 0;
}
asm("hlt"); asm("hlt");
} }
kassert(m_pending[slot].type == command_type::finished, kassert(m_pending[slot].type == command_type::finished,

26
src/kernel/pci.cpp
View File

@@ -97,21 +97,25 @@ pci_device::pci_device(pci_group &group, uint8_t bus, uint8_t device, uint8_t fu
uint16_t *command = reinterpret_cast<uint16_t *>(&m_base[1]); uint16_t *command = reinterpret_cast<uint16_t *>(&m_base[1]);
*command |= 0x400; // Mask old INTx style interrupts *command |= 0x400; // Mask old INTx style interrupts
uint16_t *status = command + 1;
log::info(logs::device, "Found PCIe device at %02d:%02d:%d of type %d.%d id %04x:%04x", log::info(logs::device, "Found PCIe device at %02d:%02d:%d of type %d.%d id %04x:%04x",
bus, device, func, m_class, m_subclass, m_vendor, m_device); bus, device, func, m_class, m_subclass, m_vendor, m_device);
// Walk the extended capabilities list if (*status & 0x0010) {
uint8_t next = m_base[13] & 0xff; // Walk the extended capabilities list
while (next) { uint8_t next = m_base[13] & 0xff;
pci_cap *cap = reinterpret_cast<pci_cap *>(kutil::offset_pointer(m_base, next)); while (next) {
next = cap->next; pci_cap *cap = reinterpret_cast<pci_cap *>(kutil::offset_pointer(m_base, next));
log::debug(logs::device, " - found PCI cap type %02x", cap->id); next = cap->next;
log::debug(logs::device, " - found PCI cap type %02x", cap->id);
if (cap->id == pci_cap::type::msi) { if (cap->id == pci_cap::type::msi) {
m_msi = cap; m_msi = cap;
pci_cap_msi *mcap = reinterpret_cast<pci_cap_msi *>(cap); pci_cap_msi *mcap = reinterpret_cast<pci_cap_msi *>(cap);
mcap->control &= ~0x70; // at most 1 vector allocated mcap->control &= ~0x70; // at most 1 vector allocated
mcap->control |= 0x01; // Enable interrupts, at most 1 vector allocated mcap->control |= 0x01; // Enable interrupts, at most 1 vector allocated
}
} }
} }
} }